1. Field Of The Invention
The present invention relates to the field of computer interfaces, particularly those between a microcomputer and a peripheral device. The invention significantly improves transfer rates in standard interfaces while retaining compatibility with the existing standards.
2. Description Of Prior Art
Known as the Integrated Drive Electronics (IDE) or the AT Attachment (ATA) interface, the traditional IDE/ATA disk-controller interface has long been the workhorse for mass storage in PC-based computers. This interface is being stretched to its limits, however, as new applications make increasing demands on mass storage devices. Next generation operating systems (e.g., Windows NT, OS/2, NextStep) and emerging multimedia applications have and will continue to require faster and faster mass storage devices.
Since the early days of the IBM PC, hard drives have existed only as I/O interfaced devices on the ISA (Industry Standard Architecture) bus. See FIG. 1. In such an implementation, the CPU transfers data by using input and output instructions. This method of data transfer is inherently slow.
The enormous increase in processor speeds in recent years has led to the widespread use of the local bus, an innovation that has emerged as a means of greatly enhancing the data throughput of I/O data transfers. The hard drive can be placed on the local bus (FIG. 2), thereby greatly increasing the speed of the bus to which the host interface circuitry and hard drive are attached. But other limitations prevent the hard drive from taking advantage of the increased bus speed in the local bus implementation of FIG. 2. For example, limitations of chipsets--the core logic of typical PC-compatible machines--slow the data transfer rate between the hard drive and memory, thereby preventing a higher data throughput. Also, the CPU in some cases will intentionally insert delays in write operations in order to prevent over-run of slower legacy devices. In other cases, inputs and outputs are delayed while the CPU processes I/O privilege checking.
These barriers to a high speed local bus implementation can be cleared to some degree by employing Direct Memory Access (DMA) to perform data transfers between the peripheral device and memory. See FIG. 3. With a DMA operation, the data transfer takes place independently of the CPU 1, and therefore many of the delays introduced by the CPU 1 and other logic are avoided. Typically, the DMA controller 2 resides on the ISA bus 3, but it can also reside on a VL, PCI, or other local bus 4 as shown in FIG. 3. A local bus DMA transfer is capable of being carried out at a very high rate. This rate is generally faster than the IDE/ATA disk controller interface 7 can support. The IDE/ATA disk controller interface 7 thus becomes a bottleneck in the implementation of FIG. 3.
What is needed, therefore, is a method for improving the interface 7 to eliminate the bottleneck involving the host interface circuitry 5 and the hard disk drive 6. Such a solution needs to retain full compatibility with the existing IDE/ATA interface standard so it may be implemented with existing interfaces, cabling, and software.